C. Capacitor
Symbol names: CAP, POLCAP
Syntax: Cnnn n1 n2 <capacitance> [ic=<value>]
+ [Rser=<value>] [Lser=<value>] [Rpar=<value>]
+ [Cpar=<value>] [m=<value>]
+ [RLshunt=<value>] [temp=<value>]
It is possible to specify an equivalent series resistance, series inductance, parallel resistance and parallel shut capacitance. The equivalent circuit is given below:
Capacitor Instance Parameters
| Name | Description |
| Rser | Equivalent series resistance |
| Lser | Equivalent series inductance |
| Rpar | Equivalent parallel resistance |
| Cpar | Equivalent parallel capacitance |
| RLshunt | Shunt resistance across Lser |
| m | Number of parallel units |
| temp | Instance temperature(for tempcos in a corresponding .model statement) |
| ic | Initial voltage(used only if uic is flagged on the .tran card) |
It is computationally better to include the parasitic Rpar, Rser, RLshunt, Cpar and Lser in the capacitor than to explicitly draft them. LTspice uses proprietary circuit simulation technology to simulate this model of a physical capacitor without any internal nodes. This makes the simulation matrix smaller, faster to solve, and less likely to be singular at short time steps.
Note that since the capacitor element includes these parasitics, it is useful for macromodeling the fundamental of a piezoelectric crystal.
There is also a general nonlinear capacitor available. Instead of specifying the capacitance, one writes an expression for the charge.
LTspice will compile this expression and symbolically differentiate it with respect to all the variables, finding the partial derivative's that correspond to capacitances.
Syntax: Cnnn n1 n2 Q=<expression> [ic=<value>] [m=<value>]
There is a special variable, x, that means the voltage across the device. Therefore, a 100pF constant capacitance can be written as
Cnnn n1 n2 Q=100p*x
A capacitance with an abrupt change from 100p to 300p at zero volts can be written as
Cnnn n1 n2 Q=x*if(x<0,100p,300p)
This device is useful for rapidly evaluating the behavior of a new a hypothetical charge model for, e.g., a transistor.